Integrated circuit and method for establishing transactions

ABSTRACT

An integrated circuit is provided comprising a plurality of master and slave modules and a network arranged for transferring messages between the modules, wherein a message issued by a master module comprises first information indicative for a location of a slave (addressed) module within the network, and second information indicative for a location within the addressed module. The integrated circuit further comprises at least one address translation means for arranging the first and the second information as a single address. The address translation means is adapted to determine which slave module is being addressed based on the single address, and the selected location of the slave (addressed) module is determined based on the single address. Accordingly, use of an address translation means for address mapping allows the design of the master modules to be implemented independent of address mapping.

FIELD OF THE INVENTION

The invention relates to an integrated circuit having a plurality ofprocessing modules and a network arranged for transferring messagesbetween processing modules and a method for exchanging messages in suchan integrated circuit.

BACKGROUND OF THE INVENTION

Systems on silicon show a continuous increase in complexity due to theever increasing need for implementing new features and improvements ofexisting functions. This is enabled by the increasing density with whichcomponents can be integrated on an integrated circuit. At the same timethe clock speed at which circuits are operated tends to increase too.The higher clock speed in combination with the increased density ofcomponents has reduced the area which can operate synchronously withinthe same clock domain. This has created the need for a modular approach.According to such an approach the processing system comprises aplurality of relatively independent, complex modules. In conventionalprocessing systems the systems modules usually communicate to each othervia a bus. As the number of modules increases however, this way ofcommunication is no longer practical for the following reasons. On theone hand the large number of modules forms a too high bus load. On theother hand the bus forms a communication bottleneck as it enables onlyone device to send data to the bus. A communication network forms aneffective way to overcome these disadvantages.

Networks on chip (NoC) have received considerable attention recently asa solution to the interconnect problem in highly-complex chips. Thereason is twofold. First, NoCs help resolve the electrical problems innew deep-submicron technologies, as they structure and manage globalwires. At the same time they share wires, lowering their number andincreasing their utilization. NoCs can also be energy efficient andreliable and are scalable compared to buses. Second, NoCs also decouplecomputation from communication, which is essential in managing thedesign of billion-transistor chips. NoCs achieve this decoupling becausethey are traditionally designed using protocol stacks, which providewell-defined interfaces separating communication service usage fromservice implementation.

Using networks for on-chip communication when designing systems on chip(SoC), however, raises a number of new issues that must be taken intoaccount. This is because, in contrast to existing on-chip interconnects(e.g., buses, switches, or point-to-point wires), where thecommunicating modules are directly connected, in a NoC the modulescommunicate remotely via network nodes. As a result, interconnectarbitration changes from centralized to distributed, and issues likeout-of order transactions, higher latencies, and end-to-end flow controlmust be handled either by the intellectual property block (IP) or by thenetwork.

Most of these topics have been already the subject of research in thefield of local and wide area networks (computer networks) and as aninterconnect for parallel machine interconnect networks. Both are verymuch related to on-chip networks, and many of the results in thosefields are also applicable on chip. However, NoC's premises aredifferent from off-chip networks, and, therefore, most of the networkdesign choices must be reevaluated. On-chip networks have differentproperties (e.g., tighter link synchronization) and constraints (e.g.,higher memory cost) leading to different design choices, whichultimately affect the network services. Storage (i.e., memory) andcomputation resources are relatively more expensive, whereas the numberof point-to-point links is larger on chip than off chip. Storage isexpensive, because general-purpose on-chip memory, such as RAMs, occupya large area. Having the memory distributed in the network components inrelatively small sizes is even worse, as the overhead area in the memorythen becomes dominant.

For on-chip networks computation too comes at a relatively high costcompared to off-chip networks. An off-chip network interface usuallycontains a dedicated processor to implement the protocol stack up tonetwork layer or even higher, to relieve the host processor from thecommunication processing. Including a dedicated processor in a networkinterface is not feasible on chip, as the size of the network interfacewill become comparable to or larger than the IP to be connected to thenetwork. Moreover, running the protocol stack on the IP itself may alsobe not feasible, because often these IPs have one dedicated functiononly, and do not have the capabilities to run a network protocol stack.

The number of wires and pins to connect network components is an orderof magnitude larger on chip than off chip. If they are not usedmassively for other purposes than NoC communication, they allow widepoint-to-point interconnects (e.g., 300-bit links). This is not possibleoff-chip, where links are relatively narrower: 8-16 bits.

On-chip wires are also relatively shorter than off chip allowing a muchtighter synchronization than off chip. This allows a reduction in thebuffer space in the routers because the communication can be done at asmaller granularity. In the current semiconductor technologies, wiresare also fast and reliable, which allows simpler link-layer protocols(e.g., no need for error correction, or retransmission). This alsocompensates for the lack of memory and computational resources.

Data ordering: In a network, data sent from a source to a destinationmay arrive out of order due to reordering in network nodes, followingdifferent routes, or retransmission after dropping. For off-chipnetworks out-of-order data delivery is typical. However, for NoCs whereno data is dropped, data can be forced to follow the same path between asource and a destination (deterministic routing) with no reordering.This in-order data transportation requires less buffer space, andreordering modules are no longer necessary.

Introducing networks as on-chip interconnects radically changes thecommunication when compared to direct interconnects, such as buses orswitches. This is because of the multi-hop nature of a network, wherecommunication modules are not directly connected, but separated by oneor more network nodes. This is in contrast with the prevalent existinginterconnects (i.e., buses) where modules are directly connected. Theimplications of this change reside in the arbitration (which must changefrom centralized to distributed), and in the communication properties(e.g., ordering, or flow control).

Transaction Ordering: Traditionally, on a bus all transactions areordered (cf. Peripheral VCI, AMBA, or CoreConnect PLB and OPB). This ispossible at a low cost, because the interconnect, being a direct linkbetween the communicating parties, does not reorder data. However, on asplit bus, a total ordering of transactions on a single master may stillcause performance penalties, when slaves respond at different speeds. Tosolve this problem, recent extensions to bus protocols allowtransactions to be performed on connections. Ordering of transactionswithin a connection is still preserved, but between connections thereare no ordering constraints (e.g., OCP, or Basic VCI). A few of the busprotocols allow out-of-order responses per connection in their advancedmodes (e.g., Advanced VCI), but both requests and responses arrive atthe destination in the same order as they were sent.

In a NoC, ordering becomes weaker. Global ordering can only be providedat a very high cost due to the conflict between the distributed natureof the networks, and the requirement of a centralized arbitrationnecessary for global ordering. Even local ordering, between asource-destination pair, may be costly. Data may arrive out of order ifit is transported over multiple routes. In such cases, to still achievean in-order delivery, data must be labeled with sequence numbers andreordered at the destination before being delivered. The communicationnetwork comprises a plurality of partly connected nodes. Messages from amodule are redirected by the nodes to one or more other nodes. To thatend the message comprises first information indicative for the locationof the addressed module(s) within the network. The message may furtherinclude second information indicative for a particular location withinthe module, such as a memory, or a register address. The secondinformation may invoke a particular response of the addressed module.

Destination Name and Routing: For a bus, the command, address, and dataare broadcasted on the interconnect. They arrive at every destination,of which one activates based on the broadcasted address, and executesthe requested command. This is possible because all modules are directlyconnected to the same bus. In a NoC, it is not feasible to broadcastinformation to all destinations, because it must be copied to allrouters and network interfaces. This floods the network with data.

SUMMARY OF THE INVENTION

It is an object of the invention to provide an integrated circuit and amethod for exchanging messages in an integrated circuit withoutintroducing to many data into the network.

This object is achieved by an integrated circuit according to claim 1and a method for exchanging messages according to claim 6.

Therefore, an integrated circuit comprising a plurality of modules M, S,and a network N arranged for transferring messages between said modulesM, S is provided, wherein a message issued by a first module M comprisesfirst information indicative for a location of an addressed modulewithin the network, and second information indicative for a locationwithin the addressed module S. Said integrated circuit further comprisesat least one address translation means AT for arranging the first andthe second information as a single address. Said address translationmeans AT is adapted to determine which module is addressed based on saidsingle address, and the selected location of the addressed module S isdetermined based on said single address

Accordingly, the design of the first modules, i.e. master modules, canbe implemented independent of the address mapping to the addressedmodules, i.e. the slave modules. Furthermore, a more efficient networkresource utilization is achieved and this scheme is backward compatiblewith busses. The addressing is performed by the address translationmeans.

According to an aspect of the invention, said integrated circuitcomprises at least one interface means ANIP, PNIP associated to one ofthe modules M, S for managing the communication between said associatedmodule M, S and the network N. Said address translation means AT isarranged in one of said interface means ANIP, PNIP.

According to a further aspect of the invention, said address translationmeans AT is arranged in said interface means ANIP, PNIP associated tosaid first module M.

According to still a further aspect of the invention, said addresstranslation means AT comprises an address mapping table, in order tostore the relation between the global and local memory mapping.

According to a further aspect of the invention, said address mappingtable is static, programmable or dynamic.

According to still a further aspect of the invention, said addressmapping table contains fields for every channel of a connection, fornetwork interface ports ANIP, PNIP of a connection, and for localaddresses in addressed modules S.

The invention also relates to a method for exchanging messages in anintegrated circuit comprising a plurality of modules M, S, the messagesbetween the modules M, S being exchanged via a network N, wherein amessage issued by a module M comprises first information indicative fora location of an addressed module S within the network, and secondinformation indicative for a location within the addressed module S.Address translation AT is performed by arranging the first and thesecond information as a single address. Said address translationdetermines which module is addressed based on said single address, andthe selected location of the addressed module (S) is determined based onsaid single address.

The invention is based on the idea to hide the addressing of data from amaster module.

Further aspects of the invention are described in the dependent claims.

These and other aspects of the invention are apparent from and will beelucidated with reference to the embodiment(s) described hereinafter.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 shows a System on chip according to a first embodiment, and

FIG. 2 shows a System on chip according to a second embodiment, and

FIG. 3 shows a System on chip according to a third embodiment.

DESCRIPTION OF THE PREFERRED EMBODIMENTS

The following embodiments relate to systems on chip, i.e. a plurality ofmodules on the same chip communicate with each other via some kind ofinterconnect. The interconnect is embodied as a network on chip NOC. Thenetwork on chip may include wires, bus, time-division multiplexing,switch, and/or routers within a network. At the transport layer of saidnetwork, the communication between the modules is performed overconnections. A connection is considered as a set of channels, eachhaving a set of connection properties, between a first module and atleast one second module. For a connection between a first module and asingle second module (i.e. simple connection), the connection comprisestwo channels, namely one from the first module to the second channel,i.e. the request channel, and a second form the second to the firstmodule, i.e. the response channel. The request channel is reserved fordata and messages from the first to the second, while the responsechannel is reserved for data and messages from the second to the firstmodule. However, if the connection involves one first and N secondmodules, 2*N channels are provided, in order to provide e.g. a multicastconnection. Here, the first module issues requests to all secondmodules. The connection properties may include ordering (data transportin order), flow control (a remote buffer is reserved for a connection,and a data producer will be allowed to send data only when it isguaranteed that space is available for the produced data), throughput (alower bound on throughput is guaranteed), latency (upper bound forlatency is guaranteed), the lossiness (dropping of data), transmissiontermination, transaction completion, data correctness, priority, or datadelivery.

FIG. 1 shows a system on chip according to a first embodiment. Thesystem comprises a master module M, two slave modules S1, S2. Eachmodule is connected to a network N via a network interface NI,respectively. The network interfaces NI are used as interfaces betweenthe master and slave modules M, S1, S2 and the network N. The networkinterfaces NI are provided to manage the communication of the respectivemodules and the network N, so that the modules can perform theirdedicated operation without having to deal with the communication withthe network or other modules. The network interfaces NI can send read rdand write wr requests and operations between each other over thenetwork.

FIG. 2 shows a system on chip according to a second embodiment. Thesystem comprises a master module M and two slave modules S1, S2, arouter network RN, and three network interfaces ANIP, PNIP between themodules and the router network RN. The network interfaces provide twonetwork interface ports NIP (one request and one response port) throughwhich the modules communicate with the router network RN or othermodules via the router network RN. The network interface portsassociated to the master module M is called the active network interfaceports ANIP and the network interface associated to the slave modules arecalled the passive network interface ports PNIP. The communicationbetween the master module M and the slave modules S1, S2 is based onrequest-response transactions, where the master M initiates atransaction by placing a request, possibly with some data or requiredconnection properties. The request REQ is delivered to the slave moduleS, via the active network interface port ANIP, the network RN and thepassive network interface port PNIP. The request is executed by theslave module T and data is returned as a response RESP if necessary orrequired. This response RESP may include data and/or acknowledgement forthe master M. A process on the master M may see an address map of 0-FF,which is allocated in the memories of the two slaves S1, S2, i.e. 0-7Fin the memory of the first slave S1 and 80-FF in the memory of thesecond slave S2. An address can be decoded at the source to find a routeto the destination module. A transaction address will therefore have twoparts: (a) a destination identifier, and (b) an internal address at thedestination.

Connections between the modules/network interfaces can be classified asfollows:

A simple connection is a connection between one ANIP and one PNIP.

A multicast connection is a connection between one ANIP and one or morePNIPs, in which the sent messages are duplicated and each PNIP receivesa copy of those messages. In a multicast connection no return messagesare currently allowed, because of the large traffic they generate (i.e.,one response per destination). It could also increase the complexity inthe ANIP because individual responses from PNIPs must be merged into asingle response for the ANIP. This requires buffer space and/oradditional computation for the merging itself.

A narrowcast connection is a connection between one ANIP and one or morePNIPs, in which each transaction that the ANIP initiates is executed byexactly one PNIP. An example of the narrowcast connection, where theANIP performs transactions on an address space which is mapped on twomemory modules. Depending on the transaction address, a transaction isexecuted on only one of these two memories.

A narrowcast connection can be implemented by decoding each transactionaddress at the active network interface ports ANIP. According to thedecoding, the target slave of the transaction is identified and thetransaction request is only sent to that particular slave, i.e. therequest will only be visible to the target slave and not to all of theslaves in the network.

FIG. 3 shows a system on chip according to a third embodiment of theinvention. The system according to the third embodiment is based on thesystem according to the second embodiment. Additionally, the activenetwork interface ports ANIP comprise an address translation manager AThaving an address mapping table AMT, wherein the address translationmanager AT performs the decoding of address of the target slave based oninformation stored in an address mapping table AMT. Said address mappingtable AMT can be implemented on a static, programmable or dynamic basisand may contain fields for every channel of a connection, for theconnection identifier, for network interface ports ANIP, PNIP of aconnection, and/or for local addresses in addressed modules S.

Every address in a slave has a global and a local address. The globaladdress relates to address as seen from the processing on the master Mand the local address relates to the address a slave. The address rangeof the global address may be 0000-FFFF, while a range within a slave maybe 000-FFF.

The global address may be formed in different ways. Firstly, it isconstituted by a network address and a local address. The networkaddress may be the port identifier of the receiving module, i.e. theport_D of the passive network interface ports PNIP. Such a scheme wouldbe backward compatible.

Secondly, the global address is constituted by a connection identifier(connection id) and a local address as minimum information oralternatively the connection identifier, the passive network interfaceports PNIP and the local address. The provision of the passive networkinterface ports PNIP is in some cases redundant but increases the safetyof the scheme. In the case of a master, a connection id identifiesseveral slaves, and there should be some means to select one of them.The network interface port NIP address or global address (from which apassive network interface port PNIP id is derived) are still needed. Inboth cases (i.e., network interface (NI) address and global address),checks as means for selection are possible, as only a subset of thenetwork interface ports NIPs are mapped to the connection:

a) The address translation is performed based on a connection id+ globaladdress, i.e. on the passive network interface port PNIP id and thelocal address, possibly also with communication properties of theconnection and check.

b) The address translation is performed based on a connection id,passive network interface port PNIP id+a local address, possibly alsowith communication properties of the connection and check.

In the case of a slave, a connection id is enough to determine thedestination of data. This destination is the unique master connected atthe unique ANIP of that connection.

As described above, the address translation is performed by the addresstranslation manager AT in the active network interface, wherein theaddress translation manager AT comprises its own address mapping tableAMT, where all information is stored which is required to perform theaddress translation. However, the address translation manager AT and/orthe address mapping table AMT may also be arranged not in the networkinterface but centrally in the network N.

According to a further embodiment of the invention, the functionality ofa narrowcast connection can also be achieved using simple or multicastconnections, however at higher cost, with less flexibility and/orhampering the modules reusability. A narrowcast connection can beimplemented using several simple connections to each slave module S.According to the address the master module M or its active networkinterface port ANIP selects an appropriate simple connection.Differential properties of the connection, i.e. different connectionproperties for the respective channels of a connection, can still beimplemented per slave. However the master module M needs to know theallocation of the address map in advance, which will hamper thereusability. The usage of simple connection make the programming of themaster module more difficult as multiple connection identifiers have tobe managed. Multiple buffers, i.e. one for each simple connection, haveto be allocated for the respective responses if multiple simpleconnection are used. However, this may require more memory thanallocating a single larger buffer as used in narrowcast connections. Forthe case that ordered narrowcast transactions are required, these haveto be implemented on a higher level, since no ordering guarantees areprovided across connections.

Alternatively, a narrowcast connection may be implemented on the basisof multicast connections. A multicast connection connects a master M toone or more slaves S1, S2. For a transaction with a response, all slaveswill respond but merely a single response is returned to the master.This filtering of response messages may be performed be an activenetwork interface ANIP associated to the master. Alternatively, anarrowcast connection based on a multicast connection can be achieved byimplementing a transaction filter at the slaves, i.e. the filtering isperformed by a passive network interface PNIP associated to the slave.The PNIP decides to forward a transaction or not to the associated slavedepending on the transaction address. However, since a multicastconnection expects a response form each slave, the PNIPs must includeempty responses, which can then be filtered by the ANIP or the module.This scheme allows simple programming of the master, since merely asingle connection is involved. The reusability of the designs of themaster modules M is also increased, since there is no need for beingaware of the address allocation on the respective slaves. But aconsiderable amount of unnecessary network traffic, i.e. the traffic toand from the slaves not addressed, is generated for which buffering isalso required. Finally, since the requests are send to every slave, afine-tune of the differential bandwidth allocation per slave can beperformed.

A transaction without a response (e.g. a posted write) is said to becomplete when it has been executed by the slave. As there is no responsemessage to the master, no guarantee regarding transaction completion canbe given.

A transaction with a response (e.g. an acknowledged write) is said to becomplete when a RETSTAT message is received from the ANIP. Recall thatwhen data is received as a response (RETDATA), a RETSTAT (possiblyimplicit) is also received to validate the data. The transaction mayeither be executed successfully, in which case a success RETSTAT isreturned, fail in its execution at the slave, and then an executionerror RETSTAT is returned, or fail because of buffer overflow in aconnection with no flow control, and then it reports an overflow error.We assume that when a slave accepts a CMD requesting a response, theslave always generates the response.

In the network, routers do not drop data, therefore, messages are alwaysguaranteed to be delivered at the NI. For connections with flow control,also NIs do not drop data. Thus, message delivery and, thus, transactioncompletion to the IPs is guaranteed automatically in this case.

However, if there is no flow control, messages may be dropped at thenetwork interface in case of buffer overflow. All of CMD, OUTDATA, andRETDATA may be dropped at the NI. To guarantee transaction completion,RETSTAT is not allowed to be dropped. Consequently, in the ANIPs enoughbuffer space must be provided to accommodate RETSTAT messages for alloutstanding transactions. This is enforced by bounding the number ofoutstanding transactions.

Now the ordering requirements between different transactions within asingle connection are described. Over different connections no orderingof transactions is defined at the transport layer.

There are several points in a connection where the order of transactionscan be observed: (a) the order in which the master module M presents CMDmessages to the ANIP, (b) the order in which the CMDs are delivered tothe slave module S1, S2 by the PNIP, (c) the order in which the slavemodule S1, S2 presents the responses to the PNIP, and (d) the order theresponses are delivered to the master by the ANIP. Note that not all of(b), (c), and (d) are always present. Moreover, there are no assumptionsabout the order in which the slaves execute transactions; only the orderof the responses can be observed. The order of the transaction executionby the slaves is considered to be a system decision, and not a part ofthe interconnect protocol.

At both ANIP and PNIPs, outgoing messages belonging to differenttransactions on the same connection are allowed to be interleaved. Forexample, two write commands can be issued, and only afterwards theirdata. If the order of OUTDATA messages differs from the order of CMDmessages, transaction identifiers must be introduced to associateOUTDATAs with their corresponding CMD.

Outgoing messages can be delivered by the PNIPs to the slaves (see b) asfollows:

Unordered, which imposes no order on the delivery of the outgoingmessages of different transactions at the PNIPs.

Ordered locally, where transactions must be delivered to each PNIP inthe order they were sent (a), but no order is imposed across PNIPs.Locally-ordered delivery of the outgoing messages can be provided eitherby an ordered data transportation, or by reordering outgoing messages atthe PNIP.

Ordered globally, where transactions must be delivered in the order theywere sent, across all PNIPs of the connection. Globally-ordered deliveryof the outgoing part of transactions require a costly synchronizationmechanism.

Transaction response messages can be delivered by the slaves to thePNIPs (c) as Ordered, when RETDATA and RETSTAT messages are returned inthe same order as the CMDs were delivered to the slave (b), or asUnordered, otherwise. When responses are unordered, there has to be amechanism to identify the transaction to which a response belongs. Thisis usually done using tags attached to messages for transactionidentifications (similar to tags in VCI).

Response messages can be delivered by the ANIP to the master (see d) asfollows:

Unordered, which imposes no order on the delivery of responses. Here,also, tags must be used to associate responses with their correspondingCMDs.

Ordered locally, where RETDATA and RETSTAT messages of transactions fora single slave are delivered in the order the original CMDs werepresented by the master to the ANIP. Note that there is no orderingimposed for transactions to different slaves within the same connection.

Globally ordered, where all responses in a connection are delivered tothe master in the same order as the original CMDs. When transactions arepipelined on a connection, then globally-ordered delivery of responsesrequires reordering at the ANIP.

All 3×2×3=18 combinations between the above orderings are possible. Outof these, we define and offer the following two. An unordered connectionis a connection in which no ordering is assumed in any part of thetransactions. As a result, the responses must be tagged to be ableidentify to which transaction they belong. Implementing unorderedconnections has low cost, however, they may be harder to use, andintroduce the overhead of tagging.

An ordered connection is defined as a connection with local ordering forthe outgoing messages from PNIPs to slaves, ordered responses at thePNIPs, and global ordering for responses at the ANIP. We choose localordering for the outgoing part because the global ordering has a toohigh cost, and has few uses. The ordering of responses is selected toallow a simple programming model with no tagging. Global ordering at theANIP is possible at a moderate cost, because all the reordering is donelocally in the ANIP. A user can emulate connections with global orderingof outgoing and return messages at the PNIPs using non-pipelinedacknowledged transactions, at the cost of high latency.

In the network, throughput can be reserved for connections in atime-division multiple access (TDMA) fashion, where bandwidth is splitin fixed-size slots on a fixed time frame. Bandwidth, as well as boundson latency and jitter can be guaranteed when slots are reserved. Theyare all defined in multiples of the slots.

As mentioned earlier, the network guarantees that messages are deliveredto the NI. Messages sent from one of the NIPs are not immediatelyvisible at the other NIP, because of the multi-hop nature of networks.Consequently, handshakes over a network would allow only a singlemessage be transmitted at a time. This limits the throughput on aconnection and adds latency to transactions. To solve this problem, andachieve a better network utilization, the messages must be pipelined. Inthis case, if the data is not consumed at the PNIP at the same rate itarrives, either flow control must be introduced to slow down theproducer, or data may be lost because of limited buffer space at theconsumer NI.

A set of NoC services is defined that abstract from the network details.Using these services in IP design decouples computation andcommunication. A request-response transaction model is used to be closeto existing on-chip interconnect protocols. This eases the migration ofcurrent IPs to NoCs. To fully utilize the NoC capabilities, such as highbandwidth and transaction concurrency, connection-oriented communicationare provided. Connections can be configured independently with differentproperties. These properties include transaction completion, varioustransaction orderings, bandwidth lower bounds, latency and jitter upperbounds, and flow control.

As described above, NoCs have different properties from both existingoff-chip networks and existing on-chip interconnects. As a result,existing protocols and service interfaces cannot be adopted directly toNoCs, but must take the characteristics of NoCs into account. Forexample, a protocol such as TCP/IP assumes the network is lossy, andincludes significant complexity to provide reliable communication.Therefore, it is not suitable in a NoC where we assume data transferreliability is already solved at a lower level. On the other hand,existing on-chip protocols such as VCI, OCP, AMBA, or CoreConnect arealso not directly applicable. For example, they assume ordered transportof data: if two requests are initiated from the same master, they willarrive in the same order at the destination. This does not holdautomatically for NoCs. Atomic chains of transactions and end-to-endflow control also need special attention in a NoC interface.

The modules as described in FIGS. 1 and 2 can be so-called intellectualproperty blocks IPs (computation elements, memories, or subsystemscontaining interconnect modules) that interact with network at saidnetwork interfaces NI. NIs provide NI ports NIP through which thecommunication services are accessed. A NI can have several NIPs to whichone or more IPs can be connected. Similarly, an IP can be connected tomore than one NI and NIP.

The communication over the network is performed by the networkinterfaces on connections, i.e. the initiator and the target module areinvisible to the network. Connections are introduced to describe andidentify communication with different properties, such as guaranteedthroughput, bounded latency and jitter, ordered delivery, or flowcontrol. For example, to distinguish and independently guaranteecommunication of 1 Mbs and 25 Mbs, two connections can be used. Two NIPscan be connected by multiple connections, possibly with differentproperties. Connections as defined here are similar to the concept ofthreads and connections from OCP and VCI. Where in OCP and VCIconnections are used only to relax transaction ordering, we generalizefrom only the ordering property to include configuration of bufferingand flow control, guaranteed throughput, and bounded latency perconnection.

The connections according to the embodiments of the invention must befirst created or established with the desired properties before beingused. This may result in resource reservations inside the network (e.g.,buffer space, or percentage of the link usage per time unit). If therequested resources are not available, the network RN will refuse therequest. After usage, connections are closed, which leads to freeing theresources occupied by that connection.

To allow more flexibility in configuring connections, and, hence, betterresource allocation per connection, the outgoing and return parts ofconnections can be configured independently. For example, a differentamount of buffer space can be allocated in the NIPs at the master andslaves, or different bandwidths can be reserved for requests andresponses.

Communication takes place on connections using transaction, consistingof a request and possibly a response. The request encodes an operation(e.g., read, write, flush, test and set, nop) and possibly carriesoutgoing data (e.g., for write commands). The response returns data as aresult of a command (e.g., read) and/or an acknowledgment. Connectionsinvolve at least two NIPs. Transactions on a connection are alwaysstarted at one and only one of the NIPs, called the connections activeNIP (ANIP). All the other NIPs of the connection are called passive NIPs(PNIP).

There can be multiple transactions active on a connection at a time, butmore generally than for split buses. That is, transactions can bestarted at the ANIP of a connection while responses for earliertransactions are pending. If a connection has multiple slaves, multipletransactions can be initiated towards different slaves. Transactions arealso pipelined between a single master-slave pair for both requests andresponses. In principle, transactions can also be pipelined within aslave, if the slave allows this.

A transaction can be composed from the following messages:

A command message (CMD) is sent by the ANIP, and describes the action tobe executed at the slave connected to the PNIP. Examples of commands areread, write, test and set, and flush. Commands are the only messagesthat are compulsory in a transaction. For NIPs that allow only a singlecommand with no parameters (e.g., fixed-size address-less write), weassume the command message still exists, even if it is implicit (i.e.,not explicitly sent by the IP).

An out data message (OUTDATA) is sent by the ANIP following a commandthat requires data to be executed (e.g., write, multicast, andtest-and-set).

A return data message (RETDATA) is sent by a PNIP as a consequence of atransaction execution that produces data (e.g., read, and test-and-set).

A completion acknowledgment message (RETSTAT) is an optional messagewhich is returned by PNIP when a command has been completed. It maysignal either a successful completion or an error. For transactionsincluding both RETDATA and RETSTAT the two messages can be combined in asingle message for efficiency. However, conceptually, they exist both:RETSTAT to signal the presence of data or an error, and RETDATA to carrythe data. In bus-based interfaces RETDATA and RETSTAT typically exist astwo separate signals.

Messages composing a transaction are divided in outgoing messages,namely CMD and OUTDATA, and response messages, namely RETDATA, RETSTAT.Within a transaction, CMD precedes all other messages, and RETDATAprecedes RETSTAT if present. These rules apply both between master andANIP, and PNIP and slave.

It should be noted that the above-mentioned embodiments illustraterather than limit the invention, and that those skilled in the art willbe able to design many alternative embodiments without departing fromthe scope of the appended claims. In the claims, any reference signsplaced between parentheses shall not be construed as limiting the claim.The word “comprising” does not exclude the presence of elements or stepsother than those listed in a claim. The word “a” or “an” preceding anelement does not exclude the presence of a plurality of such elements.In the device claim enumerating several means, several of these meanscan be embodied by one and the same item of hardware. The mere fact thatcertain measures are recited in mutually different dependent claims doesnot indicate that a combination of these measures cannot be used toadvantage.

Furthermore, any reference signs in the claims shall not be construed aslimiting the scope of the claims.

1. An integrated circuit comprising: (a) a plurality of modulescomprising a plurality of message sending modules M and a plurality ofmessage receiving modules S; (b) a network configured to exchangemessages between said plurality of message sending modules M and saidplurality of message receiving modules S based on request-responsetransactions; (c) active network interface means associated with each ofsaid plurality of message sending modules M; (d) passive networkinterface means associated with each of said plurality of messagereceiving modules S, wherein said active and passive network interfacemeans are configured to manage communication between said plurality ofmessage sending modules M and said plurality of message receivingmodules S by sending requests encoding operations, such as read, write,flush, test, set and nop, between the plurality of message sendingmodules M and the plurality of message receiving modules S; wherein saidactive network interface means is configured to perform communicationmanagement functions by receiving message requests issued by saidplurality of message sending modules M including first information andsecond information, wherein said first information is indicative of alocation of a message receiving module S within the network beingaddressed by one of said plurality of message sending modules M in saidmessage request and is comprised of (1) a connection identifieridentifying two or more message receiving modules S and (2) a portidentifier of the passive network interface means, and wherein saidsecond information is indicative of a particular location within themessage receiving module S, such as memory or register address, whereinsaid active network interface means includes address translation meansadapted to arrange said first information and said second information asa single address and determine from said received message requests whichof said message receiving modules S is being addressed in said messagerequests issued from said plurality of message sending modules M basedon said single address and further determine the particular locationwithin the addressed message receiving module S based on said singleaddress.
 2. The integrated circuit according to claim 1, wherein saidaddress translation means comprises an address mapping table configuredto store relations between global and local memory mapping. 3.Integrated circuit according to claim 2, wherein said address mappingtable contains fields for every channel of a connection between saidmessage sending module M and at least one addressed message receivingmodule S, for network interface ports of a connection, and for localaddresses in said at least one addressed message receiving module.
 4. Amethod for exchanging messages in an integrated circuit comprising aplurality of modules, the messages between the plurality of modulesbeing exchanged via a network wherein a message issued by an addressingmodule M comprises: first information indicative of a location of anaddressed message receiving module S within the network and is comprisedof (1) a connection identifier identifying two or more message receivingmodules S and (2) an identifier of a passive network interface meansassociated with the addressed message receiving module S, and secondinformation indicative of a particular location within the addressedmessage receiving module S, such as a memory, or a register address, themethod including the steps of: (a) issuing from said addressing module Ma message request including said first information, said secondinformation, and data and/or connection properties to an addresstranslation unit included as part of an active network interface moduleassociated with said addressing module M, (b) arranging, at said addresstranslation unit, the first and the second information comprising saidissued message as a single address, (c) determining, at said addresstranslation unit, which message receiving module S is being addressed insaid message request issued from said addressing module M based on saidsingle address, and (d) further determining, at said address translationunit, the particular location within the addressed message receivingmodule S based on said single address.
 5. The method according to claim4, wherein communication between said plurality of modules is performedover connections.
 6. The method according to claim 5, wherein aconnection comprises a set of channels, each channel having a set ofconnection properties between said addressing module M and at least onemessage receiving module.
 7. The method according to claim 5, whereinconnection types comprise: simple connections, multicast connections,narrowcast connections.
 8. The method according to claim 6, wherein saidconnection properties comprise: ordering, flow control, throughput,latency, lossiness, transmission termination, transaction completion,data correctness, priority and data delivery.
 9. The method according toclaim 7, wherein said simple connection is a connection between saidaddressing module M and a single addressed message receiving module S.10. The method according to claim 7, wherein said multicast andnarrowcast connections are connections between said addressing module Mand one or more addressed message receiving modules S.
 11. The methodaccording to claim 4, wherein said active network interface modulecomprises at least two network interface ports to allow an addressingmodule M associated with said active network interface module tocommunicate with a router network or at least one other messagereceiving module S from among said two or more message receiving modulesS.